ASCOT5
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offload_acc_omp.h
1
5#ifndef OFFLOAD_ACC_OMP_H
6#define OFFLOAD_ACC_OMP_H
7
8#include "ascot5.h"
9
13#if defined(GPU) && defined(_OPENMP)
14#define GPU_PARALLEL_LOOP_ALL_LEVELS \
15 str_pragma(omp target teams distribute parallel for simd)
16#elif defined(GPU) && defined(_OPENACC)
17#define GPU_PARALLEL_LOOP_ALL_LEVELS str_pragma(acc parallel loop)
18#else
19#define GPU_PARALLEL_LOOP_ALL_LEVELS str_pragma(omp simd)
20#endif
21
25#if defined(GPU) && defined(_OPENMP)
26#define GPU_PARALLEL_LOOP_ALL_LEVELS_REDUCTION(...) \
27 str_pragma(omp target teams distribute parallel for simd \
28 reduction(+:__VA_ARGS__))
29#elif defined(GPU) && defined(_OPENACC)
30#define GPU_PARALLEL_LOOP_ALL_LEVELS_REDUCTION(...) \
31 str_pragma(acc parallel loop reduction(+:__VA_ARGS__))
32#else
33#define GPU_PARALLEL_LOOP_ALL_LEVELS_REDUCTION(...)
34#endif
35
39#if defined(GPU) && defined(_OPENMP)
40#define DECLARE_TARGET str_pragma(omp declare target)
41#elif defined(GPU) && defined(_OPENACC)
42#define DECLARE_TARGET str_pragma(acc routine seq)
43#else
44#define DECLARE_TARGET
45#endif
46
50#if defined(GPU) && defined(_OPENMP)
51#define DECLARE_TARGET_END str_pragma(omp end declare target)
52#elif defined(GPU) && defined(_OPENACC)
53#define DECLARE_TARGET_END
54#else
55#define DECLARE_TARGET_END
56#endif
57
61#if defined(GPU) && defined(_OPENMP)
62#define GPU_MAP_TO_DEVICE(...) \
63 str_pragma(omp target enter data map (to: __VA_ARGS__))
64#elif defined(GPU) && defined(_OPENACC)
65#define GPU_MAP_TO_DEVICE(...) str_pragma(acc enter data copyin (__VA_ARGS__))
66#else
67#define GPU_MAP_TO_DEVICE(...)
68#endif
69
73#if defined(GPU) && defined(_OPENMP)
74#define GPU_UPDATE_FROM_DEVICE(...) \
75 str_pragma(omp target update from (__VA_ARGS__))
76#elif defined(GPU) && defined(_OPENACC)
77#define GPU_UPDATE_FROM_DEVICE(...) str_pragma(acc update host (__VA_ARGS__))
78#else
79#define GPU_UPDATE_FROM_DEVICE(...)
80#endif
81
85#if defined(GPU) && defined(_OPENMP)
86#define GPU_MAP_FROM_DEVICE(...) \
87 str_pragma(omp target exit data map (from: __VA_ARGS__))
88#elif defined(GPU) && defined(_OPENACC)
89#define GPU_MAP_FROM_DEVICE(...) \
90 str_pragma(acc exit data copyout (__VA_ARGS__))
91#else
92#define GPU_MAP_FROM_DEVICE(...)
93#endif
94
98#if defined(GPU) && defined(_OPENMP)
99#define GPU_MAP_DELETE_DEVICE(...) \
100 str_pragma(omp target exit data (delete: __VA_ARGS__))
101#elif defined(GPU) && defined(_OPENACC)
102#define GPU_MAP_DELETE_DEVICE(...) \
103 str_pragma(acc exit data delete (__VA_ARGS__))
104#else
105#define GPU_MAP_DELETE_DEVICE(...)
106#endif
107
111#if defined(GPU) && defined(_OPENMP)
112#define GPU_ATOMIC str_pragma(omp atomic)
113#elif defined(GPU) && defined(_OPENACC)
114#define GPU_ATOMIC str_pragma(omp atomic)
115#else
116#define GPU_ATOMIC str_pragma(omp atomic)
117#endif
118
122#if defined(GPU) && defined(_OPENMP)
123#define DECLARE_TARGET_SIMD
124#elif defined(GPU) && defined(_OPENACC)
125#define DECLARE_TARGET_SIMD
126#else
127#define DECLARE_TARGET_SIMD str_pragma(omp declare simd)
128#endif
129
133#if defined(GPU) && defined(_OPENMP)
134#define DECLARE_TARGET_SIMD_UNIFORM(...)
135#elif defined(GPU) && defined(_OPENACC)
136#define DECLARE_TARGET_SIMD_UNIFORM(...) \
137 str_pragma(omp declare simd uniform (__VA_ARGS__))
138#else
139#define DECLARE_TARGET_SIMD_UNIFORM(...)
140#endif
141
145#if defined(GPU) && defined(_OPENMP)
146#define GPU_DECLARE_TARGET_SIMD str_pragma(omp declare target)
147#elif defined(GPU) && defined(_OPENACC)
148#define GPU_DECLARE_TARGET_SIMD str_pragma(acc routine seq)
149#else
150#define GPU_DECLARE_TARGET_SIMD str_pragma(omp declare simd)
151#endif
152
156#if defined(GPU) && defined(_OPENMP)
157#define GPU_DECLARE_TARGET_SIMD_END str_pragma(omp end declare target)
158#elif defined(GPU) && defined(_OPENACC)
159#define GPU_DECLARE_TARGET_SIMD_END
160#else
161#define GPU_DECLARE_TARGET_SIMD_END
162#endif
163
167#if defined(GPU) && defined(_OPENMP)
168#define GPU_DECLARE_TARGET_SIMD_UNIFORM(...) str_pragma(omp declare target)
169#elif defined(GPU) && defined(_OPENACC)
170#define GPU_DECLARE_TARGET_SIMD_UNIFORM(...) str_pragma(acc routine seq)
171#else
172#define GPU_DECLARE_TARGET_SIMD_UNIFORM(...) \
173 str_pragma(omp declare simd uniform (__VA_ARGS__))
174#endif
175
179#if defined(GPU) && defined(_OPENMP)
180#define GPU_DECLARE_TARGET_SIMD_UNIFORM_END str_pragma(omp end declare target)
181#elif defined(GPU) && defined(_OPENACC)
182#define GPU_DECLARE_TARGET_SIMD_UNIFORM_END
183#else
184#define GPU_DECLARE_TARGET_SIMD_UNIFORM_END
185#endif
186
190#if defined(GPU)
191#define OMP_PARALLEL_CPU_ONLY
192#else
193#define OMP_PARALLEL_CPU_ONLY str_pragma(omp parallel)
194#endif
195
200#if defined(GPU) && defined(_OPENACC)
201#define GPU_SEQUENTIAL_LOOP str_pragma(acc loop seq)
202#else
203#define GPU_SEQUENTIAL_LOOP
204#endif
205
210#if defined(GPU) && defined(_OPENACC)
211#define GPU_DATA_IS_MAPPED(...) str_pragma(acc data present(__VA_ARGS__))
212#else
213#define GPU_DATA_IS_MAPPED(...)
214#endif
215
216#ifdef _OPENACC
220#define NGANGS 1024
221
225#define NWORKERS 8
226
230#define NVECTORS 32
231#endif // _OPENACC
232
233#endif
Main header file for ASCOT5.